The use of underfill compositions for mounting integrated circuit (IC) devices supporting surfaces such as printed wiring boards “PWBs” to obtain improved thermal and dimensional performance properties are known. An example of such can be found in U.S. Pat. No. 5,654,081, titled Integrated Circuit Assembly with Polymeric Underfill Body, which discusses the use of particular underfill compositions in mounting flip-chip IC devices to circuit boards.
Underfill compositions can be positioned between the IC and the surface (hereinafter PWB for simplicity) to which it is to be mounted either before or after electrical/metallurgical connections between the IC and PWB are made. If it is to be done after electrical connections are formed, an underfill material can be injected from the sides of gap between the IC and PWB, or through a hole in the PWB located beneath the IC. However, such injection methods tend to be problematic in regard to the time required to inject the underfill, and the difficulty in assuring a complete, uniform distribution of underfill material.
If it is to be accomplished prior to formation of the electrical connections, the underfill can either be “built-up” on (i.e. printed onto) either the IC or PWB, or provided as a pre-form which is sandwiched between the IC and PWB. Patents referencing the build up process include both U.S. Pat. No. 5,654,081 previously discussed and U.S. Pat. No. 5,936,847 titled Low Profile Electronic Circuit Modules. Printing material onto the IC or the PWB is not always desirable as it tends to overly complicate the handling process and cannot be done in parallel with formation of the ICs and PWBs.
A patent which utilizes a conductorless pre-form is U.S. Pat. No. 6,040,630 titled Integrated Circuit Package for Flip Chip with Alignment Preform Feature and Method of Forming Same. Unfortunately, conductorless preforms require the use of pads or other conductors on the IC and/or PWB which can extend through the preform.
A pre-from comprising a filled perforated dielectric structure wherein the dielectric comprises a coated polyimide film and the fill material comprises a transient liquid phase sintered material is utilized in U.S. Pat. No. 5,948,533 titled Vertically Interconnected Electronic Assemblies and Compositions Useful Therefor. However, the use of coated polyimide films is not desirable in all circumstances.
Thus, there is a need for improved methods and devices for underfilling an IC mounted to a supporting surface such as a PWB.